Power-Efficient Short-Reach Electrical Links for the AI Era

Data center, compute, and AI applications continue to demand higher bandwidth from electrical interconnects. The volume of short-reach links (less than a few cm) has exploded to facilitate high-bandwidth data movement between compute engines and memory in the AI era. This massive growth will continue as the industry moves towards highly-parallelized die-to-die interfaces to support chiplet-based architectures. However, power efficiency in these links is of paramount importance to maintain reasonable power levels within a compute drawer. This talk will focus on trends and advancements in power-efficient short reach links that aim to maximize the shoreline bandwidth density. Multi-disciplinary approaches involving circuit innovations, architectural advancements, data signaling techniques, and packaging technologies are required to deliver linear bandwidth densities above 1 Tbps/mm at power efficiencies below 500 fJ/<a href="http://bit.

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Speaker(s): Tod Dickson,

Virtual: https://events.vtools.ieee.org/m/481111