1. Artificial intelligence (AI) is transforming the landscape of healthcare, particularly in the field of robotic surgery. This presentation explores the integration of AI in surgical robots, focusing on its potential to enhance precision, efficiency, and patient outcomes. We will examine how AI-driven technologies improve surgical planning, assist in real-time decision-making, and enhance the capabilities of robotic systems in performing complex procedures. From AI-assisted image analysis and diagnostics to autonomous decision-making during surgery, this session will highlight the various ways in which AI is revolutionizing the surgical process, making procedures more accurate and minimally <a href="http://invasive.Moreover" target="_blank" title="invasive.Moreover">invasive.Moreover, the presentation will address the benefits and challenges associated with the adoption of AI in surgical robotics. These include improved surgical outcomes, reduced recovery times, and greater accessibility to advanced surgeries. Ethical considerations, data privacy, and the need for regulatory frameworks will also be discussed to ensure the responsible implementation of AI in surgical settings. Finally, we will look ahead to the future of AI-powered surgical robots, examining emerging trends and innovations that promise to further transform the field and enhance the capabilities of healthcare providers <a href="http://worldwide.Virtual:" target="_blank" title="worldwide.Virtual:">worldwide.Virtual: https://events.vtools.ieee.org/m/481641

Vehicle platooning involves a group of vehicles driving in close coordination, maintaining short inter-vehicle distances to improve road capacity, reduce fuel consumption for following vehicles, and enhance overall driving safety. Achieving this coordination requires continuous exchange and processing of environmental sensor data. To further enhance control and service performance without overloading individual vehicles, maintaining digital twins (DTs) of platooning vehicles has emerged as a promising approach. A platoon digital twin (PDT), which integrates the DTs of all platoon members, can serve as a unified interface for coordinated traffic management. However, the effectiveness of PDT-based applications relies heavily on the quality of the PDT, which in turn depends on timely and accurate synchronization with the physical platoon that requires robust communication and computation resources. In this talk, we present our recent work on joint communication and computation resource allocation to support high-quality PDTs under highly dynamic vehicle mobility. We model the problem as an M-th order Markov Decision Process (MDP) to better capture the temporal dynamics of the system. Our solution leverages a multi-agent Deep Deterministic Policy Gradient (DDPG) framework, enhanced with temporal feature extraction, to adapt to rapidly changing network conditions and improve resource allocation <a href="http://decisions.Speaker(s):" target="_blank" title="decisions.Speaker(s):">decisions.Speaker(s): Dongmei Zhao, Virtual: https://events.vtools.ieee.org/m/481625

Titre:Analog Front-End Chip Implementation for Wearable ApplicationsConférencier:Surachoke Thanapitak , Professor, Electrical Engineering Department, Mahidol, Thailand UniversityLieu:ÉTS, Pavillon A, Local A-2473 , 1100 Rue Notre-Dame Ouest, MontréalDate et heure:vendredi le 25 avril 2025 de 10:30 à 11:30Résumé:This talk presents a low-power analog front-end (AFE) chip for wearable ECG applications, featuring a low-noise amplifier (LNA) and nano-power OTA-C filter. The LNA offers high CMRR and low input-referred noise for accurate signal acquisition, while the filter effectively removes baseline drift and noise with minimal power. Fabricated in standard CMOS, the design achieves µV noise level and <1 µW power per channel, enabling high-fidelity ECG monitoring in energy-constrained <a href="http://wearables.Note" target="_blank" title="wearables.Note">wearables.Note biographique:Surachoke Thanapitak (Member, IEEE) graduated with Electronic Engineering from King Mongkut’s Institute of Technology Ladkrabang (KMITL), Thailand, in 2004. He was awarded a Royal Thai Government scholarship and obtained an MSc in Analogue and Digital IC Design (2007) and a PhD in Electrical Engineering (2012) from Imperial College London, United Kingdom. In 2012, he joined the Department of Electrical Engineering at Mahidol University as a lecturer. Currently, he is an Associate Professor in Electronics. He serves as a reviewer for the IEEE Transactions on Circuits and Systems I & II, IEEE Transactions on Biomedical Circuits and Systems, IEEE Transactions on VLSI Systems, and the IEEE Sensors Journal. In 2018, he was a Research Fellow at National Tsing Hua University, Hsinchu, Taiwan. Additionally, he served as a Tutorial Co-Chair for the 2019 IEEE Asia-Pacific Conference on Circuits and <a href="http://Systems.Co-sponsored" target="_blank" title="Systems.Co-sponsored">Systems.Co-sponsored by: ReSMiQ (Regroupement stratégique en microsystèmes du Québec)Speaker(s): Surachoke ThanapitakVirtual: https://events.vtools.ieee.org/m/482412

Data center, compute, and AI applications continue to demand higher bandwidth from electrical interconnects. The volume of short-reach links (less than a few cm) has exploded to facilitate high-bandwidth data movement between compute engines and memory in the AI era. This massive growth will continue as the industry moves towards highly-parallelized die-to-die interfaces to support chiplet-based architectures. However, power efficiency in these links is of paramount importance to maintain reasonable power levels within a compute drawer. This talk will focus on trends and advancements in power-efficient short reach links that aim to maximize the shoreline bandwidth density. Multi-disciplinary approaches involving circuit innovations, architectural advancements, data signaling techniques, and packaging technologies are required to deliver linear bandwidth densities above 1 Tbps/mm at power efficiencies below 500 fJ/<a href="http://bit.Speaker(s):" target="_blank" title="bit.Speaker(s):">bit.Speaker(s): Tod Dickson, Virtual: https://events.vtools.ieee.org/m/481111

Titre:Le numérique autour des circuits mixtesConférencier:Dominique Dallet , Professeur, Département de génie électrique, Bordeaux INP/ENSEIRB-MATMECA, FranceLieu:ÉTS, Pavillon A, Local A-2473 , 1100 Rue Notre-Dame Ouest, MontréalDate et heure:vendredi le 25 avril 2025 de 13:00 à 14:00Résumé:Le convertisseur analogique-numérique est l’un des composants clés des systèmes de réception, comme l’est l’amplificateur de puissance pour l’émission. Les systèmes de communication actuels demandent plus de bande passante et plus de précision, ou dynamique. Il est donc difficile pour les concepteurs de circuits de proposer des solutions alliant vitesse et précision. Afin de plier ce problème, nous apportons des solutions numériques que nous détaillerons pour plusieurs architectures de convertisseurs analogiques numé<a href="http://riques.Note" target="_blank" title="riques.Note">riques.Note biographique:Dominique Dallet (Membre, IEEE) a reçu le diplôme de docteur en génie électrique de l'Université de Bordeaux, Bordeaux, Talence, France, en 1995. Il est actuellement Professeur des Universités en électronique numérique à l'École d'ingénieurs Bordeaux INP, et il effectue ses recherches au sein du Laboratoire IMS (Laboratoire de l'Intégration du Matériau au Système, Bordeaux INP, Université de Bordeaux CNRS UMR 5218). De 2018 à 2024, il a été directeur du département Systèmes électroniques embarqués à l'école d'ingénieurs Bordeaux INP- ENSEIRB-MATMECA. De 2015 à 2021, il a été responsable du groupe de conception du laboratoire IMS. Il est l'auteur de plus de 300 articles dans des revues internationales et nationales, de chapitres de livres et de brevets. Ses recherches actuelles portent sur la modélisation et le test des convertisseurs de données (A/N-N/A), l'estimation des paramètres, la mise en œuvre du traitement des signaux numériques dans différentes cibles (circuit intégré à application spécifique et réseau de portes programmables), et la conception électronique pour l'amélioration numérique des circuits électroniques analogiques et mixtes (CAN, CNA, et amplificateur de puissance).Co-sponsored by: ReSMiQ (Regroupement stratégique en microsystèmes du Québec)Speaker(s): Dominique Dallet, Virtual: https://events.vtools.ieee.org/m/482413

Speaker: Murray MacDonaldSubject: Argentina Visit & Breath of IEEE And Milestone ProcessAbstract:Murray will talk about the milestone for Cobalt 60 Radiation Cancer <a href="http://Treatment.Murray" target="_blank" title="Treatment.Murray">Treatment.Murray will talk about a visit he made to Argentina in 2023, visiting their <a href="http://LMAGs.This" target="_blank" title="LMAGs.This">LMAGs.This is part of the TALK series organized by Carl Zanon of Vancouver Section LMAG. All Life Members and anyone else interested is welcome to attend. Times are Vancouver, 10:00 AM PDT is 1:00 PM <a href="http://EDT.Registration" target="_blank" title="EDT.Registration">EDT.Registration is optional, but we want to know who to <a href="http://expect.Future" target="_blank" title="expect.Future">expect.Future Talks planned:2025-May-24 TALK #32 Dr. Jaymie Matthews Astronomy Revisited2025-Jun-21 TALK #33 S. Douglas Cromey Electric Ferry in KingstonSpeaker(s): Murray MacDonaldAgenda: <a href="https://us02web.zoom.us/j/49125402539:45" target="_blank" title="https://us02web.zoom.us/j/49125402539:45">https://us02web.zoom.us/j/49125402539:45 AM PDT Zoom opens10:00 AM PDT Welcome and speaker introduction10:05 AM PDT SpeakerVirtual: https://events.vtools.ieee.org/m/477212

Anomaly detection and prediction typically require extensive domain knowledge to develop tools capable of automatically identifying or forecasting anomalous events or behaviors in IoT systems. These systems—particularly those within Public Transportation Networks—often consist of devices with diverse capabilities, functions, and operational lifespans, making the detection of rare anomalies especially challenging. Moreover, establishing domain expertise and collecting a sufficient number of data points for anomaly detection is frequently time-consuming and <a href="http://costly.Virtual:" target="_blank" title="costly.Virtual:">costly.Virtual: https://events.vtools.ieee.org/m/481954

An AI-Enabled Testbed for Satellite Mega-Constellations: From Simulator to Networks Innovation AcceleratorAbstract:Private companies are deploying satellite mega-constellations to deliver low-latency, high-throughput Internet access across the globe. Enabled by inter-satellite optical links and onboard processing, these constellations support resource-sharing networks capable of meeting diverse quality of service (QoS) requirements. However, traditional routing protocols and software-defined networking (SDN) architectures, originally designed for the relatively stable conditions of terrestrial networks, are not well suited to the dynamic nature of space environments. Furthermore, the absence of realistic experimentation platforms limits the development and validation of innovative <a href="http://solutions.To" target="_blank" title="solutions.To">solutions.To support the advancement of next-generation satellite network solutions, we have developed an AI-enabled testbed for satellite mega-constellations at Carleton University, in collaboration with NRC, DRDC, and MDA Space. This talk presents an overview of the testbed and its capabilities to model, configure, and evaluate satellite constellations, with a focus on QoS-aware routing, resilience to weather disruptions, and SDN-based <a href="http://architectures.------------------------------------------------------------------------Un" target="_blank" title="architectures.------------------------------------------------------------------------Un">architectures.------------------------------------------------------------------------Un banc d’essai activé par l’IA pour les méga-constellations de satellites : du simulateur à l’accélérateur d’innovation en réseauxRésumé:Des entreprises privées déploient des méga-constellations de satellites afin d’offrir un accès Internet à faible latence et à haut débit partout dans le monde. Grâce aux liaisons optiques inter-satellites et au traitement embarqué, ces constellations permettent la mise en place de réseaux à partage de ressources capables de répondre à des exigences variées en matière de qualité de service (QoS). Toutefois, les protocoles de routage traditionnels et les architectures de réseaux définis par logiciel (SDN), initialement conçus pour les conditions relativement stables des réseaux terrestres, ne sont pas adaptés à la nature dynamique de l’environnement spatial. De plus, l’absence de plateformes expérimentales réalistes freine le développement et la validation de solutions <a href="http://novatrices.Pour" target="_blank" title="novatrices.Pour">novatrices.Pour soutenir l’avancement des solutions de réseaux satellites de nouvelle génération, nous avons développé un banc d’essai activé par l’intelligence artificielle (IA) pour les méga-constellations de satellites à l’Université Carleton, en collaboration avec le CNRC, RDDC et MDA Space. Cette présentation offre un aperçu du banc d’essai et de ses capacités à modéliser, configurer et évaluer des constellations de satellites, en mettant l’accent sur le routage tenant compte de la QoS, la résilience face aux perturbations météorologiques et les architectures <a href="http://SDN.Pablo" target="_blank" title="SDN.Pablo">SDN.Pablo Madoery (Carleton University)About / A proposThe High Throughput and Secure Networks (HTSN) Challenge program is hosting regular virtual seminar series to promote scientific information sharing, discussions, and interactions between <a href="http://researchers.https://nrc.canada.ca/en/research-development/research-collaboration/programs/high-throughput-secure-networks-challenge-programLe" target="_blank" title="researchers.https://nrc.canada.ca/en/research-development/research-collaboration/programs/high-throughput-secure-networks-challenge-programLe">researchers.https://nrc.canada.ca/en/research-development/research-collaboration/programs/high-throughput-secure-networks-challenge-programLe programme Réseaux Sécurisés à Haut Débit (RSHD) organise régulièrement des séries de séminaires virtuels pour promouvoir le partage d’informations scientifiques, les discussions et les interactions entre <a href="http://chercheurs.https://nrc.canada.ca/fr/recherche-developpement/recherche-collaboration/programmes/programme-defi-reseaux-securises-haut-debitCo-sponsored" target="_blank" title="chercheurs.https://nrc.canada.ca/fr/recherche-developpement/recherche-collaboration/programmes/programme-defi-reseaux-securises-haut-debitCo-sponsored">chercheurs.https://nrc.canada.ca/fr/recherche-developpement/recherche-collaboration/programmes/programme-defi-reseaux-securises-haut-debitCo-sponsored by: National Research Council, Canada. <a href="http://Optonique.Speaker(s):" target="_blank" title="Optonique.Speaker(s):">Optonique.Speaker(s): Pablo Madoery, Virtual: https://events.vtools.ieee.org/m/481645

Dr. Bowen Hui, UBCO, discusses Women in Computer Science1000 K.L.O. Rd, Kelowna, British Columbia, Canada, V1Y 4X8

Silicon photonics are the semiconductor integration of EIC and PIC on a silicon substrate (wafer) with complementary metal-oxide semiconductor (CMOS) technology. On the other hand, co-packaged optics (CPO) are heterogeneous integration packaging methods to integrate the optical engine (OE) which consists of photonic ICs (PIC) and the electrical engine (EE) which consists of the electronic ICs (EIC) as well as the switch ASIC (application specific IC). The advantages of CPO are: (a) to reduce the length of the electrical interface between the OE/EE (or PIC/EIC) and the ASIC, (b) to reduce the energy required to drive the signal, and (c) to cut the latency which leads to better electrical performance. In the next few years, we will see more implementations of a higher level of heterogeneous integration of PIC and EIC, whether it is for performance, form factor, power consumption or cost. The content of this lecture is shown <a href="http://below.-" target="_blank" title="below.-">below.- Silicon Photonics- Data Centers- Optical Transceivers- Optical Engine (OE) and Electrical Engine (EE)- OBO (on-board optics)- NPO (near-board optics)- CPO (co-packaged optics)- 3D Integration of the PIC and EIC- 3D Heterogeneous Integration of PIC and EIC- 3D Heterogeneous Integration of ASIC Switch, PIC and EIC- 3D Heterogeneous Integration of ASIC Switch, PIC and EIC with Bridges- 3D Heterogeneous Integration of ASIC Switch, EIC and PIC embedded in Glass-core Substrate- Summary and Recommendationsthis event is co-hosted with the IET Ottawa Local NetworkSpeaker(s): Dr. John H Lau, Bldg: HUB 350, 350 Legget Dr, Kanata, Ontario, Canada

NASA’s Jet Propulsion Laboratory, which will celebrate its 90th anniversary in 2026, is at the forefront of building instruments for NASA missions. NASA’s mission has always been to explore the universe and our own planet Earth from space. This includes robotics missions like Voyager, which continues its journey beyond our solar system, missions to Mars and other planets, and astrophysics missions exploring stars and <a href="http://galaxies.The" target="_blank" title="galaxies.The">galaxies.The selection of NASA missions is driven by fundamental science questions, and the development of innovative instruments to answer these questions. We design and build instruments that enable precise measurements to help answer these scientific inquiries. In this presentation, we will provide an overview of the state of-the-art instruments we are currently developing and detail the science questions they aim to <a href="http://address.Rapid" target="_blank" title="address.Rapid">address.Rapid progress in various fields—such as commercial software for component and device modeling, low-loss circuits and interconnect technologies, cell phone technologies, and submicron-scale lithographic techniques—is enabling us to design and develop smart, low-power yet highly capable instruments that can even fit within SmallSat or CubeSat platforms. We will also discuss the challenges of future-generation instruments in addressing the needs of criticalscientific <a href="http://applications.The" target="_blank" title="applications.The">applications.The research described herein was carried out at the Jet Propulsion Laboratory, California Institute of Technology, Pasadena, California, USA, under contract with National Aeronautics and Space <a href="http://Administration.Co-sponsored" target="_blank" title="Administration.Co-sponsored">Administration.Co-sponsored by: StaracomSpeaker(s): Goutam Chattopadhyay , Virtual: https://events.vtools.ieee.org/m/481410

AbstractAutonomous systems are increasingly pervasive, capable, and complex—but behind every such system lie one or more feedback loops that shape how it senses, decides, and acts. Control theory has guided feedback design for decades, yet modern systems now expose the limits of its model-based foundations. The models it relies on are frequently inaccessible, inaccurate, or too rigid to fully exploit today’s data, storage, and computational resources. This talk explores a modeling approach grounded in behavioral systems theory, where systems are defined not by equations but by the set of trajectories they exhibit. The structure—or “shape”—of this set determines not only its mathematical properties but, crucially, also its tractability, governing the analytical and algorithmic tools suitable for analysis and design. I will show how this framework offers a principled bridge between parametric and non-parametric representations, enabling scalable, adaptive, and certifiable control in real-world settings—from fault detection in building automation systems, to certification in algorithmic pipelines, to large-scale control in urban traffic networks. I will conclude by outlining emerging directions and open challenges, including nonlinear and distributed dynamics, uncertainty quantification, and architectural <a href="http://considerations.Co-sponsored" target="_blank" title="considerations.Co-sponsored">considerations.Co-sponsored by: nagamune@<a href="http://mech.ubc.caSpeaker(s):" target="_blank" title="mech.ubc.caSpeaker(s):">mech.ubc.caSpeaker(s): Alberto , Agenda: Agenda:Gathering: 3:45pm - 4:00pmTalk followed by Q&A: 4pm - 5:30pmRoom: 1203, Bldg: CEME , UBC Point Grey Campus, 6250 Applied Science Lane, Vancouver , British Columbia, Canada, Virtual: https://events.vtools.ieee.org/m/479975